- A 45 nm chip’s metal-2 layer was imaged under a scanning-electron microscope, illustrating the extreme complexity of modern semiconductor routing.  
- A full 3-D electron-microscopy reconstruction of a mouse visual-cortex layer 2/3 pyramidal neuron was released by the Seung, Allen Institute, and Tolias labs as part of the IARPA MICrONS project.  
- The CacheOut micro-architectural attack paper (cacheoutattack.com) and its companion SGAxe exploit that compromises Intel SGX attestation and extracts EPID keys were both published after a five-month embargo.  
- Lattice Semiconductor revised the license for its Propel FPGA tools to remove bit-stream usage restrictions that had been criticized by the open-source FPGA community.  
- The seL4 micro-kernel has now been formally verified on the RISC-V architecture, extending its proven security properties to an open ISA.  
- Discussion of writing software that is automatically portable across CPU, GPU, and FPGA targets highlighted ongoing research in heterogeneous compilation of functional programs; a 2012 paper on “Platform-Aware Compilation of Functional Programs” was shared as background reading.  
- A Haskell implementation of the Unix wc utility (github.com/0xd34df00d/hwc) was cited as evidence that high-level functional languages can match or exceed the performance of traditional C utilities without low-level hacks.  
- Participants expressed interest in broader language support for linear types as a way to manage resources safely across CPU/GPU/FPGA boundaries.