- Discussion of “Minimal Fab,” a Japanese 10-micron semiconductor process that can be built for ~$5 M capital cost and offers one-week, few-hundred-dollar LSI fabrication runs, with JAXA/AIST prototyping space-qualified ICs using the system.  
- Exploration of hardware/software co-design: participants want a Haskell-to-VHDL compiler that can automatically decide whether to synthesize a function into custom silicon or run it on a CPU; Clash was cited as the closest existing tool, and a 2019 paper on offloading Haskell functions to FPGAs was shared.  
- Moore’s-law skepticism framed as a software problem: one participant argued that “pure” functional programming (e.g., Haskell) can extend hardware utility and mitigate the end of classical scaling.  
- Brief debate on the ethics and public reaction to He Jiankui’s CRISPR baby experiment, noting that current US and French trials are restricted to somatic (non-germline) editing.  
- Practical open-hardware links circulated: qflow (open-source digital synthesis flow) and Lattice iCE40 FPGAs were mentioned as inexpensive targets for experimentation.